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2×3.0/2.0 Yes Unknown Unknown Sabertooth Z97 Mark1 [a] Z97 32 4 DDR3: 2× Gigabit 8×3.0 0 No 3 2×3.0/2.0 *link for more info: ACS override patch required Unknown Unknown Maximus VII Ranger [a] Z97 32 4 DDR3: 1× Gigabit 6×3.0 0 1x2 2.0 M.2 shared PCH 3x2.0 2x shared PCH 1x2.0 shared PCH 1×3.0/2.0 shared CPU 1×3.0/2.0 shared CPU ...
Concrete products are codenamed "Llano": List of AMD accelerated processing units. Llano AMD Fusion ( K10 cores + Redwood -class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017)
+ Turbo Core 2.0 + IOMMU + AES + ... Release Date Code Name Model Group Cores SMT Clock rate Bus Speed ... List of Intel CPU microarchitectures;
Release date Fab CPU GPU Memory support TDP Junction temp. range (°C) Cores Clock rate Cache Model Config [i] Clock (GHz) Processing power [ii] Base Boost L1 L2 L3; V1202B: February 2018 GloFo 14LP: 2 (4) 2.3 3.2 64 KB inst. 32 KB data per core: 512 KB per core: 4 MB Vega 3 192:12:16 3 CU 1.0 384 DDR4-2400 dual-channel: 12–25 W 0–105 ...
Release date Fab CPU GPU Socket PCIe lanes Memory support TDP; Cores Clock rate Cache Model Config [i] Clock Processing power [ii] Base Boost L1 L2 L3; Athlon Pro 200U: 2019 GloFo 14LP: 2 (4) 2.3 3.2 64 KB inst. 32 KB data per core: 512 KB per core: 4 MB Radeon Vega 3 192:12:4 3 CU 1000 384 FP5 12 (8+4) DDR4-2400 dual-channel: 12–25 W Athlon 300U
Model Number Frequency L2-Cache HyperTransport Mult [b] Voltage TDP Release Date Part Number(s) Sempron 2500+ 1400 MHz: 256 KB: 800 MHz: 7x: 1.40 V: 62 W: July 7, 2005
no HDMI, Powerplay 7.0 AMD M690E chipset RS690T Athlon Neo, Mobile Sempron Radeon X1250 (350Mhz) No DirectX 9.0, AVIVO, 2× HDMI/HDCP, Powerplay 7.0 AMD M690T chipset Turion 64 X2, Athlon 64 X2 mobile: Radeon X1270 (400Mhz) DirectX 9.0, AVIVO, HDMI/HDCP, Powerplay 7.0 AMD 740 chipset RX740 2008 Athlon 64, Phenom, Sempron 55 1000 (HT 2.0) No No ...
Codenamed RD990; Four physical PCIe 2.0 ×16 slots @ x8 electrical which can be combined to create two PCIe 2.0×16 slots @ x16 electrical, six PCIe 2.0×1 lanes in various combinations of 1x 2x or 4x slots, and an additional PCIe 2.0x4 slot that does not exist on the 990x or 970 the chipset provides a total of 42 PCIe 2.0 lanes and 4 PCIe 2.0 for A-Link Express III solely in the Northbridge