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  2. PCI Express - Wikipedia

    en.wikipedia.org/wiki/PCI_Express

    PCI Express 2.1 (with its specification dated 4 March 2009) supports a large proportion of the management, support, and troubleshooting systems planned for full implementation in PCI Express 3.0. However, the speed is the same as PCI Express 2.0.

  3. List of interface bit rates - Wikipedia

    en.wikipedia.org/wiki/List_of_interface_bit_rates

    3.1 Gen 1, USB 3.2 Gen 1x1) 5 Gbit/s: 500 MB/s: 2010 eSATA (SATA 600) 6 Gbit/s: 600 MB/s: 2011 CoaXPress full (up and down bidirectional link) 6.25 Gbit/s + 20.833 Mbit/s: 781 MB/s: 2009 External PCI Express 2.0 ×2: 8 Gbit/s: 1 GB/s: USB 3.1 SuperSpeed+ (aka USB 3.1 Gen 2, USB 3.2 Gen 1x2, USB 3.2 Gen 2x1, USB4 Gen 2×1) 10 Gbit/s: 1.212 GB/s ...

  4. List of AMD chipsets - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_chipsets

    PCIe lanes [d] Gen 4 None ×8 ×12 x10 x12 ×8 ×12 Gen 3 Up to ×8 Up to ×4 Up to ×8 Up to x4 Up to ×4 Up to ×8 USB support USB 2.0: 6 12 6 12 USB 3.2 Gen 1x1 (5 Gb/s) 2 None None USB 3.2 Gen 2x1 (10 Gb/s) 2 4 8 2 6 4 8 USB 3.2 Gen 2x2 (20 Gb/s) None 1 [e] 2 [f] None 1 [e] 2 [f] Storage features SATA III ports Up to 4 Up to 8 Up to 4 Up to ...

  5. CFexpress - Wikipedia

    en.wikipedia.org/wiki/CFexpress

    PCIe 3.0 x1 PCIe 3.0 x2 PCIe 3.0 x4 ... NAB show in 2018 demonstrated 1,400 Mbyte/sec read speed and over 700 Mbyte/sec burst write speed. ... Type B USB 3.2 Gen 2×2 ...

  6. List of Intel chipsets - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_chipsets

    Speed PCI Express lanes Optane Memory support SATA PCIe M.2. Wireless MAC USB ports TDP; 6 Gbit/s v2.0 v3.2 4.0 3.0 Gen 1x1 Gen 2x1 Gen 2x2 Z890: Arrow Lake SRPEZ(B0 ...

  7. Thunderbolt (interface) - Wikipedia

    en.wikipedia.org/wiki/Thunderbolt_(interface)

    40 Gbit/s speed, USB4 compliant (peripheral only), with 4x Thunderbolt 4 ports for branching hub topology. Tunnelling of DP1.4, USB 3 (10 Gbit/s), PCIe (32 Gbit/s). Has PCIe 3.0 x1 and USB 3 (10 Gbit/s) native interfaces. JHL9540 Computers 2 13 × 13 3.25 - 4 Barlow Ridge 2024 Q3 40 Gbit/s speed, USB4 v2 compliant, 3x DP 2.1 [a], PCIe x4 Gen 4

  8. Ivy Bridge (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)

    Ivy Bridge is the codename for Intel's 22 nm microarchitecture used in the third generation of the Intel Core ... PCIe 3.0 Up to quad channel DDR3-1866 1660v2: 6 (12 ...

  9. List of Intel Xeon chipsets - Wikipedia

    en.wikipedia.org/wiki/List_of_Intel_Xeon_chipsets

    1 ×16 PCIe Gen 2, 2 ×4 PCIe Gen 1 to talk to southbridge ICH10 (ICH9 also possible) Integrated Management Engine with its own 100 Mbit/s Ethernet [28] 5520: Tylersburg-36S, Tylersburg-36D 1, 2 4.8, 5.86 or 6.4 GT/s 2 ×16 PCIe Gen 2, 1 ×4 PCIe Gen 1 to talk to southbridge ICH10 (ICH9 also possible)

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