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The first published version was the 32-bit SPARC version 7 (V7) in 1986. SPARC version 8 (V8), an enhanced SPARC architecture definition, was released in 1990. The main differences between V7 and V8 were the addition of integer multiply and divide instructions, and an upgrade from 80-bit "extended-precision" floating-point arithmetic to 128-bit ...
The Ultra 10 came in a mid-tower case with a 300, 333, 360, or 440-MHz 64-bit UltraSPARC CPU. It doubled the supported RAM to a maximum of 1024 MB in four DIMM slots and added room for a second ATA hard disk, a fourth PCI card, and an UPA graphics card such as the Creator , Creator3D or Elite3D .
In the late 1990s, HAL Computer Systems, a subsidiary of Fujitsu, was designing a successor to the SPARC64 GP as the SPARC64 V. First announced at Microprocessor Forum 1999, the HAL SPARC64 V would have operated 1 GHz and had a wide superscalar organization with superspeculation, an L1 instruction trace cache, a small but very fast 8 KB L1 data cache, and separate L2 caches for instructions ...
SPARC was initially a 32-bit architecture (SPARC V7) until the introduction of the SPARC V9 architecture in 1995, which added 64-bit extensions. Sun developed several generations of SPARC-based computer systems, including the SPARCstation, Ultra, and Sun Blade series of workstations, and the SPARCserver, Netra, Enterprise, and Sun Fire line of ...
OpenSPARC is an open-source hardware project, started in December 2005, for CPUs implementing the SPARC instruction architecture. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32-thread microprocessor, the UltraSPARC T1 processor.
A 32-bit version of the 801 was eventually produced in a single-chip form as the IBM ROMP in 1981, which stood for 'Research OPD [Office Products Division] Micro Processor'. [15] This CPU was designed for "mini" tasks, and found use in peripheral interfaces and channel controllers on later IBM computers.
ERC32 is a radiation-tolerant 32-bit RISC processor (SPARC V7 specification) developed for space applications. It was developed by Temic, which was later acquired by Atmel and then Microchip.
The SuperSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems. 33 and 40 MHz versions were introduced in 1992. The SuperSPARC contains 3.1 million transistors.