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2. Comet Lake - Wikipedia

   en.wikipedia.org/wiki/Comet_Lake

   DDR4-2933 memory support for Core i7 and i9; DDR4-2666 for Core i3, Core i5, Pentium Gold, Celeron; 400-series chipset based on the LGA 1200 socket; Comet Lake-H compared to Coffee Lake-H Refresh. Higher turbo frequencies by up to 300 MHz; DDR4-2933 memory support; Thermal Velocity Boost for Core i7 and i9; Comet Lake-U compared to Whiskey Lake-U

3. Intel Core - Wikipedia

   en.wikipedia.org/wiki/Intel_Core

   In each generation, the highest-performing Core i7 processors use the same socket and QPI-based architecture as the medium-end Xeon processors of that generation, while lower-performing Core i7 processors use the same socket and PCIe/DMI/FDI architecture as the Core i5. "Core i7" is a successor to the Intel Core 2 brand.

4. List of Intel processors - Wikipedia

   en.wikipedia.org/wiki/List_of_Intel_processors

   Intel Haswell Core i7-4771 CPU, sitting atop its original packaging that contains an OEM fan-cooled heatsink. This generational list of Intel processors attempts to present all of Intel's processors from the 4-bit 4004 (1971) to the present high-end offerings. Concise technical data is given for each product.

5. Raptor Lake - Wikipedia

   en.wikipedia.org/wiki/Raptor_Lake

   The HX processors only support: DDR5-4800 (DDR5-5600 for i7-13850HX and above), DDR4-3200. The processors are connected to PCHs using an OPIO 2.0 x8 interface, except for the HX series which uses a DMI 4.0 x8 interface. [29] Except for the HX series, the processor and PCH are packaged together on a multi-chip package.

6. Tiger Lake - Wikipedia

   en.wikipedia.org/wiki/Tiger_Lake

   Tiger Lake is Intel's codename for the 11th generation Intel Core mobile processors based on the Willow Cove Core microarchitecture, manufactured using Intel's third-generation 10 nm process node known as 10SF ("10 nm SuperFin").

7. AVX-512 - Wikipedia

   en.wikipedia.org/wiki/AVX-512

   AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), [1] and then later in a number of AMD and other Intel CPUs (see list below).