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The power consumption of the initial PlayStation 3 units, based on 90 nm Cell CPU, ranges from 170–200 W during normal use, despite having a 380 W power supply. [ 33 ] The power consumption of newer 40 GB PlayStation 3 units (65 nm process Cell/90 nm RSX), ranges from 120-140 W during normal use.
2x Back USB 3.1 1x HDMI 2.1. Power supply 165 W: 310 W 5 W ... PlayStation 3 Slim PlayStation 3 Super Slim; ... Toggle the table of contents.
A 120 GB Slim model Motorized slot-loading disc cover. This feature is absent in the Super Slim model. The redesigned version of the PlayStation 3 (commonly referred to as the "PS3 Slim" and officially branded "PS3") features an upgradeable 120 GB, 160 GB, [25] [26] 250 GB or 320 GB [25] [26] hard drive and is 33% smaller, 36% lighter and consumes 34% (CECH-20xx) or 45% (CECH-21xx) less power ...
The PlayStation Store is an online virtual market available to users of Sony's PlayStation 3 (PS3) and PlayStation Portable (PSP) game consoles via the PlayStation Network. The Store offers a range of downloadable content both for purchase and available free of charge.
Features: Initial feature size (process node) was 0.5 micron (500 nm). [3] 850k – 1M transistors [4] Operating performance: 30 MIPS [5] Bus bandwidth 132 MB/s [6] One arithmetic/logic unit (ALU) One shifter; CPU cache RAM: 4 KB instruction cache [2] 1 KB data cache configured as a scratchpad [7] Geometry Transformation Engine (GTE)
Differences between the CUH-11 and CUH-12 series included a reduction in rated power from 250 W to 230 W, a reduction in weight from 2.8 to 2.5 kg, and physical buttons. [3] [4] [5] The CUH-12xx series are also referred to as the "C chassis" variant of the PS4. [6] In late June 2015, a 1 TB CUH-11 series machine was announced for European/PAL ...
Reference named "specs": From Nintendo Entertainment System: "NES Specifications" From PlayStation 3: "About PlayStation3 - Technical Specifications". PlayStation.com}: soft hyphen character in |title= at position 18
The CPU core is a two-way superscalar in-order RISC processor. [3] Based on the MIPS R5900, it implements the MIPS-III instruction set architecture (ISA) and much of MIPS-IV, in addition to a custom instruction set developed by Sony which operated on 128-bit wide groups of either 32-bit, 16-bit, or 8-bit integers in single instruction, multiple data (SIMD) fashion (e.g. four 32-bit integers ...