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2. Ralf Brown's Interrupt List - Wikipedia

   en.wikipedia.org/wiki/Ralf_Brown's_Interrupt_List

   Ralf Brown's Interrupt List (aka RBIL, x86 Interrupt List, MS-DOS Interrupt List or INTER) is a comprehensive list of interrupts, calls, hooks, interfaces, data structures, CMOS settings, memory and port addresses, as well as processor opcodes for x86 machines from the 1981 IBM PC up to 2000 (including many clones), [1] [2] [nb 1] most of it still applying to IBM PC compatibles today.

3. x86 instruction listings - Wikipedia

   en.wikipedia.org/wiki/X86_instruction_listings

   New opcodes that introduced new functionality (e.g. SHLD, SETcc) For instruction forms where the operand size can be inferred from the instruction's arguments (e.g. ADD EAX,EBX can be inferred to have a 32-bit OperandSize due to its use of EAX as an argument), new instruction mnemonics are not needed and not provided.

4. List of CIL instructions - Wikipedia

   en.wikipedia.org/wiki/List_of_CIL_instructions

   Opcode abbreviated from operation code is the portion of a machine language instruction that specifies the operation to be performed. Base instructions form a Turing-complete instruction set. Object model instructions provide an implementation for the Common Type System.

5. Intel 8085 - Wikipedia

   en.wikipedia.org/wiki/Intel_8085

   The Intel 8085 ("eighty-eighty-five") is an 8-bit microprocessor produced by Intel and introduced in March 1976. [2] It is the last 8-bit microprocessor developed by Intel. It is software-binary compatible with the more-famous Intel 8080 with only two minor instructions added to support its added interrupt and serial input/output features.

6. INT (x86 instruction) - Wikipedia

   en.wikipedia.org/wiki/INT_(x86_instruction)

   The opcode for INT3 is 0xCC, as opposed to the opcode for INT immediate8, which is 0xCD immediate8. Since the dedicated 0xCC opcode has some desired special properties for debugging, which are not shared by the normal two-byte opcode for an INT3, assemblers do not normally generate the generic 0xCD 0x03 opcode from mnemonics.

7. NOP (code) - Wikipedia

   en.wikipedia.org/wiki/NOP_(code)

   Opcode for OR 0,0,0. [6] LDI 26,0: 4 0x34000034 Palindromic NOP - that is, an instruction that executes as NOP regardless of whether byte order is interpreted as little-endian or big-endian. Some PA-RISC system instructions are required to be followed by seven palindromic NOPs. [6] PowerPC: NOP: 4 0x60000000 (extended opcode for ori r0,r0,0)

8. Opcode table - Wikipedia

   en.wikipedia.org/wiki/Opcode_table

   An opcode table (also called an opcode matrix) is a visual representation of all opcodes in an instruction set. It is arranged such that each axis of the table represents an upper or lower nibble, which combined form the full byte of the opcode. Additional opcode tables can exist for additional instructions created using an opcode prefix.

9. HLT (x86 instruction) - Wikipedia

   en.wikipedia.org/wiki/HLT_(x86_instruction)

   In the x86 computer architecture, HLT (halt) is an assembly language instruction which halts the central processing unit (CPU) until the next external interrupt is fired. [1] ...