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2. List of CIL instructions - Wikipedia

   en.wikipedia.org/wiki/List_of_CIL_instructions

   Load address of local variable with index indx, short form. Base instruction 0x14 ldnull: Push a null reference on the stack. Base instruction 0x71 ldobj <typeTok> Copy the value stored at address src to the stack. Object model instruction 0x7E ldsfld <field> Push the value of the static field on the stack. Object model instruction 0x7F ldsflda ...

3. x86 instruction listings - Wikipedia

   en.wikipedia.org/wiki/X86_instruction_listings

   New opcodes that introduced new functionality (e.g. SHLD, SETcc) For instruction forms where the operand size can be inferred from the instruction's arguments (e.g. ADD EAX,EBX can be inferred to have a 32-bit OperandSize due to its use of EAX as an argument), new instruction mnemonics are not needed and not provided.

4. Intel 8085 - Wikipedia

   en.wikipedia.org/wiki/Intel_8085

   The Intel 8085 ("eighty-eighty-five") is an 8-bit microprocessor produced by Intel and introduced in March 1976. [2] It is the last 8-bit microprocessor developed by Intel. It is software-binary compatible with the more-famous Intel 8080 with only two minor instructions added to support its added interrupt and serial input/output features.

5. PIC instruction listings - Wikipedia

   en.wikipedia.org/wiki/PIC_instruction_listings

   When bit 15 of the opcode is set, it indicates that the 8-bit operand address in opcode bits 0–6 and 14 is extended to 16 bits using bits 0–7 of the following instruction word. Such instructions are written with an L prefix (LADD vs. ADD) and take an extra cycle to execute.

6. INT (x86 instruction) - Wikipedia

   en.wikipedia.org/wiki/INT_(x86_instruction)

   The opcode for INT3 is 0xCC, as opposed to the opcode for INT immediate8, which is 0xCD immediate8. Since the dedicated 0xCC opcode has some desired special properties for debugging, which are not shared by the normal two-byte opcode for an INT3, assemblers do not normally generate the generic 0xCD 0x03 opcode from mnemonics.

7. Ralf Brown's Interrupt List - Wikipedia

   en.wikipedia.org/wiki/Ralf_Brown's_Interrupt_List

   Ralf Brown's Interrupt List (aka RBIL, x86 Interrupt List, MS-DOS Interrupt List or INTER) is a comprehensive list of interrupts, calls, hooks, interfaces, data structures, CMOS settings, memory and port addresses, as well as processor opcodes for x86 machines from the 1981 IBM PC up to 2000 (including many clones), [1] [2] [nb 1] most of it still applying to IBM PC compatibles today.

8. Opcode table - Wikipedia

   en.wikipedia.org/wiki/Opcode_table

   An opcode table (also called an opcode matrix) is a visual representation of all opcodes in an instruction set. It is arranged such that each axis of the table represents an upper or lower nibble, which combined form the full byte of the opcode. Additional opcode tables can exist for additional instructions created using an opcode prefix.

9. Illegal opcode - Wikipedia

   en.wikipedia.org/wiki/Illegal_opcode

   An illegal opcode, also called an unimplemented operation, [1] unintended opcode [2] or undocumented instruction, is an instruction to a CPU that is not mentioned in any official documentation released by the CPU's designer or manufacturer, which nevertheless has an effect.