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  2. Logic gate - Wikipedia

    en.wikipedia.org/wiki/Logic_gate

    A logic gate is a device that performs a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has, for instance, zero rise time and unlimited fan-out, or it may refer to a non-ideal physical device [1] (see ...

  3. Diode logic - Wikipedia

    en.wikipedia.org/wiki/Diode_logic

    Diode logic (or diode-resistor logic) constructs AND and OR logic gates with diodes and resistors. An active device ( vacuum tubes with control grids in early electronic computers , then transistors in diode–transistor logic ) is additionally required to provide logical inversion (NOT) for functional completeness and amplification for voltage ...

  4. OR gate - Wikipedia

    en.wikipedia.org/wiki/OR_gate

    This schematic diagram shows the arrangement of four OR gates within a standard 4071 CMOS integrated circuit. OR gates are basic logic gates, and are available in TTL and CMOS ICs logic families. The standard 4000 series CMOS IC is the 4071, which includes four independent two-input OR gates. The TTL device is the 7432.

  5. Wired logic connection - Wikipedia

    en.wikipedia.org/wiki/Wired_logic_connection

    See also: Diode logic § Active-high AND logic gate Open-collector buffers connected as wired AND.. The wired AND connection is a form of AND gate.When using open collector or similar outputs (which can be identified by the ⎐ symbol in schematics), wired AND only requires a pull up resistor on the shared output wire.

  6. OR-AND-invert - Wikipedia

    en.wikipedia.org/wiki/OR-AND-invert

    OR-AND-invert gates or OAI-gates are logic gates comprising OR gates followed by a NAND gate. They can be efficiently implemented in logic families like CMOS and TTL. They are dual to AND-OR-invert gates.

  7. Current-mode logic - Wikipedia

    en.wikipedia.org/wiki/Current-mode_logic

    Current mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for logic gates and for board-level digital signaling of digital data.. The basic principle of CML is that current from a constant current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented.

  8. AND gate - Wikipedia

    en.wikipedia.org/wiki/AND_gate

    The AND gate is a basic digital logic gate that implements logical conjunction (∧) from mathematical logic – AND gate behaves according to the truth table. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1). If not all of the inputs to the AND gate are HIGH, a LOW output results.

  9. XOR gate - Wikipedia

    en.wikipedia.org/wiki/XOR_gate

    XOR gate (sometimes EOR, or EXOR and pronounced as Exclusive OR) is a digital logic gate that gives a true (1 or HIGH) output when the number of true inputs is odd. An XOR gate implements an exclusive or ( ↮ {\displaystyle \nleftrightarrow } ) from mathematical logic ; that is, a true output results if one, and only one, of the inputs to the ...