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High speed (HS) rate of 480 Mbit/s was introduced in 2001 by USB 2.0. High-speed devices must also be capable of falling-back to full-speed as well, making high-speed devices backward compatible with USB 1.1 hosts. Connectors are identical for USB 2.0 and USB 1.x. SuperSpeed (SS) rate of 5.0 Gbit/s. The written USB 3.0 specification was ...
High-speed USB 2.0 hubs contain devices called transaction translators that convert between high-speed USB 2.0 buses and full and low speed buses. There may be one translator per hub or per port. Because there are two separate controllers in each USB 3.0 host, USB 3.0 devices transmit and receive at USB 3.0 signaling rates regardless of USB 2.0 ...
In USB 3.0, dual-bus architecture is used to allow both USB 2.0 (Full Speed, Low Speed, or High Speed) and USB 3.0 (SuperSpeed) operations to take place simultaneously, thus providing backward compatibility. The structural topology is the same, consisting of a tiered star topology with a root hub at level 0 and hubs at lower levels to provide ...
The USB 3.0 Micro-B plug effectively consists of a standard USB 2.0 Micro-B cable plug, with an additional 5 pins plug "stacked" to the side of it. In this way, cables with smaller 5 pin USB 2.0 Micro-B plugs can be plugged into devices with 10 contact USB 3.0 Micro-B receptacles and achieve backward compatibility.
USB OTG defines two roles for devices: OTG A-device and OTG B-device, specifying which side supplies power to the link, and which initially is the host. The OTG A-device is a power supplier, and an OTG B-device is a power consumer. In the default link configuration, the A-device acts as a USB host with the B-device acting as a USB peripheral ...
The xHCI reduces the need for periodic device polling by allowing a USB 3.0 or later device to notify the host controller when it has data available to read, and moves the management of polling USB 2.0 and 1.1 devices that use interrupt transactions from the CPU-driven USB driver to the USB host controller.
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