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This is a table of 64/32-bit central processing units that implement the ARMv8-A instruction set architecture and mandatory or optional extensions of it. Most chips support the 32-bit ARMv7-A for legacy applications.
AMD Zen+ Family 17h – revised Zen architecture (optimisation and die shrink to 12 nm). AMD Zen 2 Family 17h – second generation Zen architecture based on 7 nm process, first architecture designed around chiplet technology. [3] AMD Zen 3 Family 19h – third generation Zen architecture in the optimised 7 nm process with major core redesigns. [4]
Open Virtualization [150] is an open source implementation of the trusted world architecture for TrustZone. AMD has licensed and incorporated TrustZone technology into its Secure Processor Technology. [151] AMD's APUs include a Cortex-A5 processor for handling secure processing, which is enabled in some, but not all products.
An instruction set architecture (ISA) is an abstract model of a computer, also referred to as computer architecture.A realization of an ISA is called an implementation.An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware.
This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name. In 2005, ARM provided a summary of the numerous vendors who implement ARM cores in their design. [ 1 ]
x86, x86_64, RISC-V, ARM64 and LoongArch (ARM and POWER in the -rt branch) [1] RedHawk Linux RTOS Proprietary: closed hardware-in-the-loop, software-in-the-loop, general purpose active Intel, AMD, ARM, NVIDIA Drive, NVIDIA Jetson Orin REX OS: Proprietary: closed, available with license: embedded: inactive: ARM RIOT: GNU LGPL: open source: active
HiSilicon Kirin Series: See List of HiSilicon Kirin SoC, Mediatek MT Series : See List of Mediatek MT SoC, Qualcomm Snapdragon Series: See List of Qualcomm Snapdragon SoC [broken anchor] Cortex-A55: Samsung: Exynos 850, UNISOC: SC9863, SC9863A, Rockchip: RK3566, RK3568 Rockchip RK3566: Boardcon Compact3566. Cortex-A57: AMD: Opteron A1100-series ...
Concrete products are codenamed "Llano": List of AMD accelerated processing units. Llano AMD Fusion ( K10 cores + Redwood -class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017)