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2. Advanced packaging (semiconductors) - Wikipedia

   en.wikipedia.org/wiki/Advanced_packaging...

   Advanced packaging [1] is the aggregation and interconnection of components before traditional integrated circuit packaging where a single die is packaged. Advanced packaging allows multiple devices, including electrical, mechanical, or semiconductor devices, to be merged and packaged as a single electronic device.

3. Rudolph Enters Back-End Lithography Market with Breakthrough ...

   www.aol.com/news/2012-12-12-rudolph-enters-back...

   The Azores acquisition uniquely positions Rudolph in the back-end stepper advanced packaging photolithography market with a significantly expanded business model, and we believe that by offering ...

4. Three-dimensional integrated circuit - Wikipedia

   en.wikipedia.org/wiki/Three-dimensional...

   3D ICs can be divided into 3D Stacked ICs (3D SIC), which refers to advanced packaging techniques [10] [11] [12] stacking IC chips using TSV interconnects, and monolithic 3D ICs, which use fab processes to realize 3D interconnects at the local levels of the on-chip wiring hierarchy as set forth by the ITRS, this results in direct vertical ...

5. Aristos Christou - Wikipedia

   en.wikipedia.org/wiki/Aristos_Christou

   At the University of Maryland, Christou chaired the Department of Materials and Nuclear Engineering (1993-2003) and the Materials Science and Engineering Department in 2003. [ 5 ] Christou directed the NSF University-Industry Cooperative Research Center in Optoelectronic Devices Interconnects and Packaging (COEDIP) from 2002 until 2005. [ 6 ]

6. Veeco - Wikipedia

   en.wikipedia.org/wiki/Veeco

   Veeco Instruments Inc. is a global capital equipment supplier, headquartered in the U.S., that designs and builds processing systems used in semiconductor and compound semiconductor manufacturing, data storage and scientific markets for applications such as advanced packaging, photonics, power electronics and display technologies.

7. Fan-out wafer-level packaging - Wikipedia

   en.wikipedia.org/wiki/Fan-out_wafer-level_packaging

   [1] [2] Fan-out packaging is seen as a low cost advanced packaging alternative to packages that use silicon interposers, such as those seen in 2.5D and 3D packages. [3] [4] In conventional technologies, a wafer is diced first, and then individual dies are packaged; package size is usually considerably larger than the die size.