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To understand the advantages, start with the slice-by-2 case. We wish to compute a CRC two bytes (16 bits) at a time, but the standard table-based approach would require an inconveniently large 65536-entry table. As mentioned in § Generating the lookup table, CRC tables have the property that table[i xor j] = table[i] xor table[j].
The CRC and associated polynomial typically have a name of the form CRC-n-XXX as in the table below. The simplest error-detection system, the parity bit , is in fact a 1-bit CRC: it uses the generator polynomial x + 1 (two terms), [ 5 ] and has the name CRC-1.
These inversions are extremely common but not universally performed, even in the case of the CRC-32 or CRC-16-CCITT polynomials. They are almost always included when sending variable-length messages, but often omitted when communicating fixed-length messages, as the problem of added zero bits is less likely to arise.
Using the Telcordia standards for circuit naming allow a LEC the ability to build a certain amount of intelligence into the name of a circuit. The way Telcordia has developed circuit IDs, different types of circuit connections require different formats for the circuit ID. In each format, different segments of the ID have very specific meaning.
The frame check sequence (FCS) is a 16-bit CRC-CCITT or a 32-bit CRC-32 computed over the Address, Control, and Information fields. It provides a means by which the receiver can detect errors that may have been induced during the transmission of the frame, such as lost bits, flipped bits, and extraneous bits.
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There are two fundamental limitations on when it is possible to construct a lookup table for a required operation. One is the amount of memory that is available: one cannot construct a lookup table larger than the space available for the table, although it is possible to construct disk-based lookup tables at the expense of lookup time.