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The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable program, often stored as a computer file and executed on the processor. The x86 instruction set has been extended several times, introducing wider registers and datatypes as well as new ...
An instruction set architecture (ISA) is an abstract model of a computer, also referred to as computer architecture.A realization of an ISA is called an implementation.An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware.
The x86 architecture is a variable instruction length, primarily "CISC" design with emphasis on backward compatibility. The instruction set is not typical CISC, however, but basically an extended version of the simple eight-bit 8008 and 8080 architectures.
The first was the CISC (Complex Instruction Set Computer), which had many different instructions. In the 1970s, however, places like IBM did research and found that many instructions in the set could be eliminated. The result was the RISC (Reduced Instruction Set Computer), an architecture that uses a smaller set of instructions.
In general, the features of the modern x86 instruction set are: A compact encoding Variable length and alignment independent (encoded as little endian, as is all data in the x86 architecture) Mainly one-address and two-address instructions, that is to say, the first operand is also the destination.
The x86 instruction set has several times been extended with SIMD (Single instruction, multiple data) instruction set extensions.These extensions, starting from the MMX instruction set extension introduced with Pentium MMX in 1997, typically define sets of wide registers and instructions that subdivide these registers into fixed-size lanes and perform a computation for each lane in parallel.
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) [note 1] is a 64-bit extension of the x86 instruction set architecture first announced in 1999. It introduces two new operating modes: 64-bit mode and compatibility mode, along with a new four-level paging mechanism.
Added important powerful new instructions, SSE4.2. Westmere: 32 nm shrink of the Nehalem microarchitecture with several new features. Sandy Bridge 32 nm microarchitecture, released January 9, 2011. Formerly called Gesher but renamed in 2007. [2] First x86 to introduce 256 bit AVX instruction set and implementation of YMM registers.