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  2. NE1000 - Wikipedia

    en.wikipedia.org/wiki/NE1000

    In order to create these at minimal R&D, engineering and production costs, Novell based their board on the DP839EB, [1] a reference design created by National Semiconductor using the 8390 Ethernet chip. Compared to the reference design's direct memory access, [1] Novell used Programmed I/O, which limited performance.

  3. I/O Controller Hub - Wikipedia

    en.wikipedia.org/wiki/I/O_Controller_Hub

    ICH - 82801AA. The first version of the ICH was released in June 1999 along with the Intel 810 northbridge.While its predecessor, the PIIX, was connected to the northbridge through an internal PCI bus with a bandwidth of 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8-bit wide, 266 MB/s bus.

  4. List of open-source hardware projects - Wikipedia

    en.wikipedia.org/wiki/List_of_open-source...

    Amber is an ARM-compatible 32-bit RISC processor. Amber implements the ARMv2 instruction set. LEON, a 32-bit, SPARC-like CPU created by the European Space Agency; OpenPOWER, based on IBM's POWER8 and newer multicore processor designs; OpenSPARC, a series of open-source microprocessors based on the UltraSPARC T1 and UltraSPARC T2 multicore ...

  5. Intel Galileo - Wikipedia

    en.wikipedia.org/wiki/Intel_Galileo

    The Intel development board comes with several computing industry standard I/O interfaces. The support for PCI Express means that Wifi, Bluetooth or GSM cards can be plugged in to the board. It also enables usage of solid state drives with the Galileo. [11] The 10/100 Mbit Ethernet support enables the board to be connected to a LAN.

  6. SERCOS III - Wikipedia

    en.wikipedia.org/wiki/SERCOS_III

    Sercos is a deterministic Ethernet-based automation bus that uses a frame summation technique for highly efficient communication. [7] Cyclic updates to devices are made at rates as low as 31.25 μs [8] Support for up to 511 Slave devices on one network [9] Redundancy: Bump-less physical layer single-fault recovery [10]

  7. CompactPCI - Wikipedia

    en.wikipedia.org/wiki/CompactPCI

    6U cards have an identical J1, a J2 that is always used for 64-bit PCI, as well as J3, J4, and J5 connectors for a variety of uses either as user-defined I/O or specified signaling such as Telephony and/or Ethernet signaling. Hot-plugging is a supported feature of CompactPCI.

  8. Network interface controller - Wikipedia

    en.wikipedia.org/wiki/Network_interface_controller

    12 early ISA 8 bit and 16 bit PC network cards. The lower right-most card is an early wireless network card, and the central card with partial beige plastic cover is a PSTN modem. Intel Ophir 82571 dual-port Gigabit Ethernet controller die. Network controllers were originally implemented as expansion cards that plugged into a computer bus.

  9. Memory-mapped I/O and port-mapped I/O - Wikipedia

    en.wikipedia.org/wiki/Memory-mapped_I/O_and_port...

    Memory-mapped I/O is preferred in IA-32 and x86-64 based architectures because the instructions that perform port-based I/O are limited to one register: EAX, AX, and AL are the only registers that data can be moved into or out of, and either a byte-sized immediate value in the instruction or a value in register DX determines which port is the source or destination port of the transfer.