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The Advanced eXtensible Interface (AXI) is an on-chip communication bus protocol and is part of the Advanced Microcontroller Bus Architecture specification (AMBA). [ 1 ] [ 2 ] AXI had been introduced in 2003 with the AMBA3 specification.
In its second version, AMBA 2 in 1999, Arm added AMBA High-performance Bus (AHB) that is a single clock-edge protocol. In 2003, Arm introduced the third generation, AMBA 3, including Advanced eXtensible Interface (AXI) to reach even higher performance interconnect and the Advanced Trace Bus (ATB) as part of the CoreSight on-chip debug and trace ...
The Open Core Protocol (OCP) is a protocol for on-chip subsystem communications. It is an openly licensed, core-centric protocol and defines a bus-independent, configurable interface. OCP International Partnership produces OCP specifications. OCP data transfer models range from simple request-grant handshaking through pipelined request-response ...
Master and Slave Wishbone's interfaces. The Wishbone Bus is an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other.
The ccTalk multidrop bus protocol uses an 8 bit TTL-level asynchronous serial protocol.It uses address randomization to allow multiple similar devices on the bus (after randomisation the devices can be distinguished by their serial number). ccTalk was developed by CoinControls, but is used by multiple vendors.
Automated X-ray inspection (AXI) is a technology based on the same principles as automated optical inspection (AOI). It uses X-rays as its source, instead of visible light , to automatically inspect features, which are typically hidden from view.
Traditionally, a device has an interrupt line (pin) which it asserts when it wants to signal an interrupt to the host processing environment. This traditional form of interrupt signalling is an out-of-band form of control signalling since it uses a dedicated path to send such control information, separately from the main data path.
BFMs are sometimes referred to as TVMs or Transaction Verification Models. This is to emphasize that bus operations of the model have been bundled into atomic bus transactions to make it easier to issue and view bus transactions. Visualizations of the bus transactions modeled by TVMs are similar to the output of a protocol analyzer or bus sniffer.