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  2. Physical coding sublayer - Wikipedia

    en.wikipedia.org/wiki/Physical_Coding_Sublayer

    The physical coding sublayer (PCS) is a networking protocol sublayer in the Fast Ethernet, Gigabit Ethernet, and 10 Gigabit Ethernet standards. It resides at the top of the physical layer (PHY), and provides an interface between the physical medium attachment ( PMA ) sublayer and the media-independent interface (MII).

  3. Ethernet physical layer - Wikipedia

    en.wikipedia.org/wiki/Ethernet_physical_layer

    PCS (Physical Coding Sublayer) - This sublayer performs auto-negotiation and basic encoding (e.g., 8b/10b), lane separation and recombination. For Ethernet, the bit rate at the top of the PCS is the nominal bit rate , e.g. 10 Mbit/s for classic Ethernet or 1000 Mbit/s for Gigabit Ethernet.

  4. Physical layer - Wikipedia

    en.wikipedia.org/wiki/Physical_layer

    A PHY connects a link layer device (often called MAC as an acronym for medium access control) to a physical medium such as an optical fiber or copper cable. A PHY device typically includes both physical coding sublayer (PCS) and physical medium dependent (PMD) layer functionality. [16]

  5. Physical medium dependent - Wikipedia

    en.wikipedia.org/wiki/Physical_Medium_Dependent

    The Ethernet PMD sublayer is part of the Ethernet physical layer (PHY). The hierarchy is as follows: Data link layer (Layer 2) Logical link control (LLC) sublayer; Medium access control (MAC) sublayer Reconciliation sublayer (RS) – This sublayer processes PHY local/remote fault messages and handles DDR conversion; PHY layer (Layer 1)

  6. 10 Gigabit Ethernet - Wikipedia

    en.wikipedia.org/wiki/10_Gigabit_Ethernet

    Its Physical Coding Sublayer (PCS) is 64b/66b and is defined in IEEE 802.3 Clause 49 and its Physical Medium Dependent (PMD) sublayer in Clause 52. It delivers serialized data at a line rate of 10.3125 Gbd. [29] The range depends on the type of multi-mode fiber used. [24] [30]

  7. XAUI - Wikipedia

    en.wikipedia.org/wiki/XAUI

    The optional XGMII Extender can be inserted between the Reconciliation Sublayer and the PHY (physical layer) to transparently extend the physical reach of the XGMII and reduce the interface pin count from 72 to 16. The XGMII is organized into four lanes with each lane conveying a data octet or control character on each edge of the associated clock.

  8. IEEE 802.3 - Wikipedia

    en.wikipedia.org/wiki/IEEE_802.3

    IEEE 802.3 is a working group and a collection of standards defining the physical layer and data link layer's media access control (MAC) of wired Ethernet.The standards are produced by the working group of the Institute of Electrical and Electronics Engineers (IEEE).

  9. PME Aggregation Function - Wikipedia

    en.wikipedia.org/wiki/PME_Aggregation_Function

    The PAF is located in the physical coding sublayer (PCS), between the media access control (MAC)-PHY Rate Matching function and the Transmission Convergence (TC) sublayer. It interfaces with the PMEs across the λ-interface, and to the MAC-PHY Rate Matching function using an abstract interface.