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The Intel QuickPath Interconnect (QPI) [1] [2] is a scalable processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008. It increased the scalability and available bandwidth. Prior to the name's announcement, Intel referred to it as Common System Interface ...
The Intel X58 (codenamed Tylersburg) is an Intel chip designed to connect Intel processors with Intel QuickPath Interconnect (QPI) interface to peripheral devices. Supported processors implement the Nehalem microarchitecture and therefore have an integrated memory controller (IMC), so the X58 does not have a memory interface.
More modern designs use point-to-point and serial connections like AMD's HyperTransport and Intel's DMI 2.0 or QuickPath Interconnect (QPI). These implementations remove the traditional northbridge in favor of a direct link from the CPU to the system memory, high-speed peripherals, and the Platform Controller Hub, southbridge or I/O controller.
The Intel Ultra Path Interconnect (UPI) [1] [2] is a scalable processor interconnect developed by Intel which replaced the Intel QuickPath Interconnect (QPI) in Xeon Skylake-SP platforms starting in 2017.
Embedded instrumentation technologies such as Intel's IBIST [6] (Interconnect Built-In Self Test) can test and measure all lanes on all buses concurrently. This makes the test more robust and more complete, and it reduces the amount of time required to validate the system.
Avalon – proprietary bus system by Altera for use in their Nios II SoCs [5] Open Core Protocol (OCP) from Accellera; HyperTransport (HT) from AMD (though this is an off-chip interface, not on-chip bus) QuickPath Interconnect (QPI) by Intel (though this is an off-chip interface, not on-chip bus) virtual share from PICC - free and open source
Both Intel CPU families share a common chipset; the interconnection is called Intel QuickPath Interconnect (QPI), which provides extremely high bandwidth to enable high on-board scalability and was replaced by a new version called Intel UltraPath Interconnect with the release of Skylake (2017). [7]
AnandTech tested the Intel QuickPath Interconnect (4.8 GT/s version) and found the copy bandwidth using triple-channel 1,066 MHz DDR3 was 12.0 GB/s. A 3.0 GHz Core 2 Quad system using dual-channel 1066 MHz DDR3 achieved 6.9 GB/s. [15] Maximum PC has discovered that Intel has unlocked the QPI clock and memory multipliers on retail 920s and 940s.