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The following table shows features of AMD's processors with 3D graphics, ... A6-3670K: Dec 20, 2011: 2.7 AD3670WNGXBOX AD3670WNZ43GX A8-3800: Aug 17, 2011: 2.4 2.7
Llano AMD Fusion (K10 cores + Redwood-class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017) [ edit ]
AMD announced the Brazos-T platform on 9 October 2012. It comprised the 4.5-watt AMD Z-Series APU (codenamed Hondo) and the A55T Fusion Controller Hub (FCH), designed for the tablet computer market. [42] [43] The Hondo APU is a redesign of the Desna APU. AMD lowered energy use by optimizing the APU and FCH for tablet computers. [44] [45]
Architecture Fabrication (nm) Family Release Date Code name Model Group Cores SMT Clock rate () Bus Speed & Type [a] Cache Socket Memory Controller Features L1 L2
Model – The marketing name for the GPU assigned by AMD/ATI. Note that ATI trademarks have been replaced by AMD trademarks starting with the Radeon HD 6000 series for desktop and AMD FirePro series for professional graphics. Codename – The internal engineering codename for the GPU. Launch – Date of release for the GPU.
AMD Ultrathin Platform introduced on January 5, 2011, as the fourth AMD mobile platform targeting the ultra-portable notebook market. It features the 40 nm AMD Ontario (a 9-watt AMD APU for netbooks and small form factor desktops and devices) and Zacate (an 18-watt TDP APU for ultrathin, mainstream, and value notebooks as well as desktops and ...
The UMI interface previously used by AMD for communicating with the FCH is replaced with a PCIe connection. Technically the processor can operate without a chipset; it only continues to be present for interfacing with low speed I/O. AMD server CPUs adopt a self contained system on chip design instead which doesn't require a chipset. [11] [12 ...
AMD Steamroller Family 15h is a microarchitecture developed by AMD for AMD APUs, which succeeded Piledriver in the beginning of 2014 as the third-generation Bulldozer-based microarchitecture. [2] Steamroller APUs continue to use two-core modules as their predecessors, while aiming at achieving greater levels of parallelism.