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Pointer authentication [23] (AArch64 only); mandatory extension (based on a new block cipher, QARMA [24]) to the architecture (compilers need to exploit the security feature, but as the instructions are in NOP space, they are backwards compatible albeit providing no extra security on older chips). Nested virtualization (AArch64 only).
An ARMv8-A processor can support one or both of AArch32 and AArch64; it may support AArch32 and AArch64 at lower Exception levels and only AArch64 at higher Exception levels. [162] For example, the ARM Cortex-A32 supports only AArch32, [163] the ARM Cortex-A34 supports only AArch64, [164] and the ARM Cortex-A72 supports both AArch64 and AArch32 ...
This is a table of 64/32-bit central processing units that implement the ARMv8-A instruction set architecture and mandatory or optional extensions of it. Most chips support the 32-bit ARMv7-A for legacy applications.
This is a list of central processing units based on the ARM family of instruction sets designed by ARM Ltd. and third parties, sorted by version of the ARM instruction set, release and name.
AWS Graviton is a family of 64-bit ARM-based CPUs designed by the Amazon Web Services (AWS) subsidiary Annapurna Labs.The processor family is distinguished by its lower energy use relative to x86-64, static clock rates, and lack of simultaneous multithreading.
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AArch64 (Kunpeng), x86-64 on openEuler community & ARM, RISC-V, x86, x64 and LoongArch on OpenHarmony and Oniro OS as add-on kernel μITRON: T-License: open source embedded: active: ARM, MIPS, x86, Renesas RX100-200-600-700-others μ-velOSity: Proprietary? microkernel: active? velOSity: Proprietary??