Search results
Results from the WOW.Com Content Network
A 3 GHz model of the Intel Pentium 4 processor that incorporates Hyper-Threading Technology [7] Hyper-Threading Technology is a form of simultaneous multithreading technology introduced by Intel, while the concept behind the technology has been patented by Sun Microsystems. Architecturally, a processor with Hyper-Threading Technology consists ...
The Intel Pentium 4 was the first modern desktop processor to implement simultaneous multithreading, starting from the 3.06 GHz model released in 2002, and since introduced into a number of their processors. Intel calls the functionality Hyper-Threading Technology, and provides a basic two-thread SMT engine
Overall efficiency varies; Intel claims up to 30% improvement with its Hyper-Threading Technology, [1] while a synthetic program just performing a loop of non-optimized dependent floating-point operations actually gains a 100% speed improvement when run in parallel.
Later versions introduced Hyper-Threading Technology (HTT). The first Pentium 4-branded processor to implement 64-bit was the Prescott (90 nm) (February 2004), but this feature was not enabled. Intel subsequently began selling 64-bit Pentium 4s using the "E0" revision of the Prescotts, being sold on the OEM market as the Pentium 4, model F.
All models support: MMX, SSE, SSE2, SSE3, Hyper-threading, Intel 64, XD bit (an NX bit implementation) Intel VT-x supported by: 6x2 e.g. Model 662 and 672; Enhanced Intel SpeedStep Technology (EIST) supported by: all except 620. Transistors: 169 million; Die size: 135 mm 2; Steppings: N0, R0
Hyper-Threading support is only available on CPUs using the 800 MHz system bus. The processor's integer instruction pipeline has been increased from 20 stages to 31 stages, which theoretically allows for even greater bandwidth; 7500 to 11,000 MIPS; LGA 775 versions are in the 5xx series (32-bit) and 5x1 series (with Intel 64)
[citation needed] Nehalem reimplements certain features of NetBurst, including the Hyper-Threading technology first introduced in the 3.06 GHz Northwood core, and L3 cache, first implemented on a consumer processor in the Gallatin core used in the Pentium 4 Extreme Edition.
Tunnel Creek" CPU with an Altera Field Programmable Gate Array (FPGA) CPU core supports IA-32 architecture, MMX, SSE, SSE2, SSE3, SSSE3, Enhanced Intel SpeedStep Technology (EIST), Hyper-Threading, Intel VT-x; Package size: 37.5 mm × 37.5 mm; Steppings: B0; TDP without FPGA. Total package TDP depends on functions included in FPGA. Max. TDP 7 W.