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  2. PowerPC e5500 - Wikipedia

    en.wikipedia.org/wiki/PowerPC_e5500

    The FPU is taken straight from the PowerPC e600 core, which is a classic fully pipelined dual precision IEEE 754 unit running at full core speed and supports conversion between 64-bit floats and integers, effectively twice as fast as the FPU in e500mc. The e5500 also introduces an enhanced branch prediction unit with an 8-entry link stack.

  3. i.MX - Wikipedia

    en.wikipedia.org/wiki/I.MX

    The i.MX range is a family of NXP proprietary microprocessors dedicated to multimedia applications based on the ARM architecture and focused on low-power consumption. The i.MX application processors are SoCs (System-on-Chip) that integrate many processing units into one die, like the main CPU, a video processing unit, and a graphics processing unit for instance.

  4. List of NXP products - Wikipedia

    en.wikipedia.org/wiki/List_of_NXP_products

    M·CORE processors, like 68000 family processors, have a user mode and a supervisor mode, and in user mode both see a 32 bit PC and 16 registers, each 32 bits. The M·CORE instruction set is very different from the 68k instruction set—in particular, M·CORE is a pure load-store machine and all M·CORE instructions are 16 bit, while 68k ...

  5. PowerPC e6500 - Wikipedia

    en.wikipedia.org/wiki/PowerPC_e6500

    The PowerPC e6500 is a multithreaded 64-bit Power ISA-based microprocessor core from Freescale Semiconductor (now part of NXP). e6500 will power the entire range of QorIQ AMP Series system on a chip (SoC) processors which share the common naming scheme: "Txxxx". Hard samples, manufactured on a 28 nm process, available in early 2012 with full ...

  6. List of PowerPC processors - Wikipedia

    en.wikipedia.org/wiki/List_of_PowerPC_processors

    To keep costs low on high-volume competitive products, the CPU core is usually bundled into a system-on-chip (SOC) integrated circuit. SOCs contain the processor core, cache and the processor's local data on-chip, along with clocking, timers, memory (SDRAM), peripheral (network, serial I/O), and bus (PCI, PCI-X, ROM/Flash bus, I2C) controllers.

  7. Comparison of CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_CPU_micro...

    Multithreading, multi-core, 8 fine-grained threads per core of which 2 can be executed simultaneously, 2-way simultaneous multithreading, 6 cores per chip, out-of-order, 48 MB L3 cache, out-of order execution, RAS features, stream-processing unit, hardware-assisted cryptographic acceleration, 6 cryptography units per chip, Hardware random ...

  8. Computer performance by orders of magnitude - Wikipedia

    en.wikipedia.org/wiki/Computer_performance_by...

    17.17×10 15: IBM Sequoia's LINPACK performance, June 2013 [10] 20×10 15: roughly the hardware-equivalent of the human brain according to Ray Kurzweil. Published in his 1999 book: The Age of Spiritual Machines: When Computers Exceed Human Intelligence [11] 33.86×10 15: Tianhe-2's LINPACK performance, June 2013 [10]

  9. NXP ColdFire - Wikipedia

    en.wikipedia.org/wiki/NXP_ColdFire

    The NXP ColdFire is a microprocessor that derives from the Motorola 68000 family architecture, manufactured for embedded systems development by NXP Semiconductors. It was formerly manufactured by Freescale Semiconductor (formerly the semiconductor division of Motorola ) which merged with NXP in 2015.