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The Pentium 4 was a seventh-generation CPU from Intel targeted at the consumer and enterprise markets. ... 1.2 V: 25.8 W: Socket 478: April 23, 2002: RH80532GC017512 ...
Socket 478, also known as mPGA478 or mPGA478B, is a 478-contact CPU socket used for Intel's Pentium 4 and Celeron series CPUs. Socket 478 was launched in August 2001 in advance of the Northwood core to compete with AMD's 462-pin Socket A and their Athlon XP processors. Socket 478 was intended to be the replacement for Socket 423, a Willamette ...
Display controller with 1 MIPI DSI port and 2 DDI ports (HDMI 1.4) Integrated Intel HD Graphics (Gen7) GPU; One USB controller supporting two USB 2.0 ports; Integrated LPE audio controller; Integrated image signal processor supporting two MIPI CSI ports and 8 MP sensors; Integrated memory card reader supporting SDIO 3.0, eMMC 4.51, and SDXC
Intel Core 2 Duo T9600 CPU showing Socket P. The front-side bus (FSB) of CPUs that install in Socket P can run at 400, 533, 667, 800, or 1066 MT/s.By adapting the multiplier the frequency of the CPU can throttle up or down to save power, given that all Socket P CPUs support EIST, except for Celeron that do not support EIST.
In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23. In Core 2 processors, it is used with the code names Penryn (Socket P), Wolfdale (LGA 775) and Yorkfield (MCM, LGA 775), some of which are also sold as Celeron, Pentium and Xeon processors.
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Penryn is the code name of a mobile processor from Intel that is sold in varying configurations such as Core 2 Solo, Core 2 Duo, Core 2 Quad, Pentium and Celeron. During development, Penryn was the Intel code name for the 2007/2008 "Tick" of Intel's Tick-Tock cycle which shrunk Merom to 45 nanometers as CPUID model 23.
The Merom-L processor is based on the same model as Conroe-L but is used in mobile Socket M and Socket P systems as Celeron 5xx and Core 2 Solo U2xxx, some of which also use regular Merom and Merom-2M chips with one core disabled in contrast to the real Merom-L that only has 1 MB L2 cache and a single core.
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