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Verilogger Extreme is a newer, compiled-code simulator that is Verilog-2001 compliant and much faster than Pro. Verilog-XL: Cadence Design Systems: V1995: The original Verilog simulator, Gateway Design's Verilog-XL was the first (and only, for a time) Verilog simulator to be qualified for ASIC (validation) sign-off.
SPICE, Verilog, Spectre netlists; plug-ins: Ngspice: n/a 2024 Windows, macOS, Linux Backend simulator for Altium Designer, Eagle, KiCad, Qucs-S [15] SPICE [16] UC Berkeley: 1993 Source-only End-of-life, no longer updated; historically important, because many analog simulators are based on this project Xyce [17] Sandia National Laboratories: 2023
Verilator is now used within academic research, open source projects and for commercial semiconductor development. It is part of the growing body of free electronic design automation (EDA) software. It is free and open-source software released under a GNU Lesser General Public License (LGPL) 3.0 only, or an Artistic License 2.0.
Released under the GNU General Public License, Icarus Verilog is free software, an alternative to proprietary software like Cadence's Verilog-XL. As of release 0.9, Icarus is composed of a Verilog compiler (including a Verilog preprocessor) with support for plug-in backends, and a virtual machine that simulates the design.
OpenSPARC is an open-source hardware project, started in December 2005, for CPUs implementing the SPARC instruction architecture. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32-thread microprocessor, the UltraSPARC T1 processor.
The OpenROAD project offers a complete stack of tools from high-level synthesis down to layout generation [7] The flow includes Yosys for logic synthesis, OpenLane for physical synthesis and targets the SkyWater 130nm PDK. The flow is currently utilized to submit design for free fabrication at Google. [8] [9] [better source needed]
With grant funding from Nlnet, [5] the Gnucap project started to implement a first free/libre simulator with Verilog-AMS capabilities. As of July 2023 the model generator covers most of the analog subset and effectively replaces ADMS.
Quite Universal Circuit Simulator (Qucs) is a free-software electronics circuit simulator software application released under GPL.It offers the ability to set up a circuit with a graphical user interface and simulate the large-signal, small-signal and noise behaviour of the circuit.