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The International Obfuscated C Code Contest (abbreviated IOCCC) is a computer programming contest for the most creatively obfuscated C code. Held semi-annually, it is described as "celebrating [C's] syntactical opaqueness". [1] The winning code for the 27th contest, held in 2020, was released in July 2020. [2]
ModelSim is a multi-language environment by Siemens [1] (previously developed by Mentor Graphics, [2]) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger. [3] [2] ModelSim can be used independently, or in conjunction with Intel Quartus Prime, PSIM, [4] Xilinx ISE or Xilinx ...
VisSim - system simulation and optional C-code generation of electrical, process, control, bio-medical, mechanical and UML State chart systems. Vortex (software) - a complete simulation platform featuring a realtime physics engine for rigid body dynamics, an image generator, desktop tools (Editor and Player) and more. Also available as Vortex ...
Verilogger Extreme is a newer, compiled-code simulator that is Verilog-2001 compliant and much faster than Pro. Verilog-XL: Cadence Design Systems: V1995: The original Verilog simulator, Gateway Design's Verilog-XL was the first (and only, for a time) Verilog simulator to be qualified for ASIC (validation) sign-off.
MCU simulator with many debugging features: register status, step by step, interrupt viewer, external memory viewer, code memory viewer, etc. Simulator for certain electronic peripherals like LEDs, LED displays, LED matrices, LCD displays, etc. Support for C language; Native macro-assembler; Support for ASEM-51 and other assemblers
The "VisSim/C-Code" add-on generates ANSI C code for the model, and generates target specific code for on-chip devices like PWM, ADC, encoder, GPIO, I2C etc. This is useful for development of embedded systems. After the behaviour of the controller has been simulated, C-code can be generated, compiled and run on the target.
Xspice [6] is an extension to Spice3 that provides additional C language code models to support analog behavioral modeling and co-simulation of digital components through a fast event-driven algorithm. Cider [7] adds a numerical device simulator to ngspice. It couples the circuit-level simulator to the device simulator to provide enhanced ...
Source code can be compiled with the SystemC library (which includes a simulation kernel) to give an executable. The performance of the OSCI open-source implementation is typically worse than commercial VHDL/Verilog simulators when used for register transfer level simulation. [citation needed]