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2. USB 3.0 - Wikipedia

   en.wikipedia.org/wiki/USB_3.0

   In USB 3.0, dual-bus architecture is used to allow both USB 2.0 (Full Speed, Low Speed, or High Speed) and USB 3.0 (SuperSpeed) operations to take place simultaneously, thus providing backward compatibility. The structural topology is the same, consisting of a tiered star topology with a root hub at level 0 and hubs at lower levels to provide ...

3. USB - Wikipedia

   en.wikipedia.org/wiki/USB

   Even though USB 3.0's 4.5 W is sometimes insufficient to power external hard drives, technology is advancing, and external drives gradually need less power, diminishing the eSATA advantage. eSATAp (power over eSATA, a.k.a. ESATA/USB) is a connector introduced in 2009 that supplies power to attached devices using a new, backward compatible ...

4. List of interface bit rates - Wikipedia

   en.wikipedia.org/wiki/List_of_interface_bit_rates

   The physical phenomena on which the device relies (such as spinning platters in a hard drive) will also impose limits; for instance, no spinning platter shipping in 2009 saturates SATA revision 2.0 (3 Gbit/s), so moving from this 3 Gbit/s interface to USB 3.0 at 4.8 Gbit/s for one spinning drive will result in no increase in realized transfer rate.

5. USB communications - Wikipedia

   en.wikipedia.org/wiki/USB_communications

   Full speed (FS) rate of 12 Mbit/s is the basic USB signaling rate defined by USB 1.0. All USB hubs can operate at this rate. High speed (HS) rate of 480 Mbit/s was introduced in 2001 by USB 2.0. High-speed devices must also be capable of falling-back to full-speed as well, making high-speed devices backward compatible with USB 1.1 hosts ...

6. USB Attached SCSI - Wikipedia

   en.wikipedia.org/wiki/USB_Attached_SCSI

   USB 3.0 SuperSpeed and USB 2.0 High-Speed versions defined USB 3.0 SuperSpeed – host controller (xHCI) hardware support, no software overhead for out-of-order commands; USB 2.0 High-speed – enables command queuing in USB 2.0 drives; Streams were added to the USB 3.0 SuperSpeed protocol for supporting UAS out-of-order completions

7. Extensible Host Controller Interface - Wikipedia

   en.wikipedia.org/wiki/Extensible_Host_Controller...

   The xHCI reduces the need for periodic device polling by allowing a USB 3.0 or later device to notify the host controller when it has data available to read, and moves the management of polling USB 2.0 and 1.1 devices that use interrupt transactions from the CPU-driven USB driver to the USB host controller.