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  2. PCI Express - Wikipedia

    en.wikipedia.org/wiki/PCI_Express

    PCI Express Mini Card (also known as Mini PCI Express, Mini PCIe, Mini PCI-E, mPCIe, and PEM), based on PCI Express, is a replacement for the Mini PCI form factor. It is developed by the PCI-SIG . The host device supports both PCI Express and USB 2.0 connectivity, and each card may use either standard.

  3. USB4 - Wikipedia

    en.wikipedia.org/wiki/USB4

    USB4 has, from the start, referenced the PCI Express Specification Revision 4 and with USB4 Version 2.0 added references to PCI Express Specification Revision 5.0. PCIe tunneling has had a significant limitation in USB4 Version 1.0 and also Thunderbolt 3: PCIe Express has a variable maximum payload size , which applies end-to-end to a transmission.

  4. List of interface bit rates - Wikipedia

    en.wikipedia.org/wiki/List_of_interface_bit_rates

    PCI Express 3.0 (×8 link) [n] 64 Gbit/s: 7.88 GB/s: 2011 PCI Express 2.0 (×16 link) [n] 80 Gbit/s: 8 GB/s: 2007 RapidIO Gen2 16x: 80 Gbit/s: 10 GB/s: PCI Express 5.0 (×4 link) 128 Gbit/s: 15.75 GB/s: 2019 PCI Express 3.0 (×16 link) [n] 128 Gbit/s: 15.75 GB/s: 2011 CAPI: 128 Gbit/s: 15.75 GB/s: 2014 QPI (4.80GT/s, 2.40 GHz) 153.6 Gbit/s: 19. ...

  5. Comparison of memory cards - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_memory_cards

    Same build as SD but greater capacity and transfer speed, 4 GB to 32 GB (not compatible with older host devices). miniSDHC: 2008 32 GB [4] Same build as miniSD but greater capacity and transfer speed, 4 GB to 32 GB. 8 GB is largest in early-2011 (not compatible with older host devices). microSDHC: 2007 32 GB [4]

  6. Thunderbolt (interface) - Wikipedia

    en.wikipedia.org/wiki/Thunderbolt_(interface)

    It allows up to 4 lanes of PCI Express 3.0 (32.4 Gbit/s) for general-purpose data transfer, and 4 lanes of DisplayPort 1.4 HBR3 (32.40 Gbit/s before 8/10 encoding removal, and 25.92 Gbit/s after) for video, [79] but the maximum combined data rate cannot exceed 40 Gbit/s; video data will be using all needed speed, limiting PCIe data. DP 1.2 ...

  7. Compute Express Link - Wikipedia

    en.wikipedia.org/wiki/Compute_Express_Link

    On August 2, 2022, the CXL Specification 3.0 was released, based on PCIe 6.0 physical interface and PAM-4 coding with double the bandwidth; new features include fabrics capabilities with multi-level switching and multiple device types per port, and enhanced coherency with peer-to-peer DMA and memory sharing. [25] [26]

  8. CFexpress - Wikipedia

    en.wikipedia.org/wiki/CFexpress

    The specification would be based on the PCI Express interface and NVM Express protocol. On 18 April 2017 the CompactFlash Association published the CFexpress 1.0 specification. [ 2 ] Version 1.0 will use the XQD form-factor (38.5 mm × 29.8 mm × 3.8 mm) with two PCIe 3.0 lanes for speeds up to 2 GB/s.

  9. Mobile PCI Express Module - Wikipedia

    en.wikipedia.org/wiki/Mobile_PCI_Express_Module

    Mobile PCI Express Module (MXM) is an interconnect standard for GPUs (MXM Graphics Modules) in laptops using PCI Express created by MXM-SIG. The goal was to create a non-proprietary, industry standard socket, so one could easily upgrade the graphics processor in a laptop, without having to buy a whole new system or relying on proprietary vendor upgrades.

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