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  2. List of 7400-series integrated circuits - Wikipedia

    en.wikipedia.org/wiki/List_of_7400-series...

    hex inverter gate: 14 SN74LS04: 74x05 6 hex inverter gate open-collector 14 SN74LS05: 74x06 6 hex inverter gate open-collector 30 V / 40 mA 14 SN74LS06: 74x07 6 hex buffer gate: open-collector 30 V / 40 mA 14 SN74LS07: 74x08 4 quad 2-input AND gate: 14 SN74LS08: 74x09 4 quad 2-input AND gate open-collector 14 SN74LS09: 74x10 3 triple 3-input ...

  3. Inverter (logic gate) - Wikipedia

    en.wikipedia.org/wiki/Inverter_(logic_gate)

    The hex inverter is an integrated circuit that contains six inverters. For example, the 7404 TTL chip which has 14 pins and the 4049 CMOS chip which has 16 pins, 2 of which are used for power/referencing, and 12 of which are used by the inputs and outputs of the six inverters (the 4049 has 2 pins with no connection).

  4. 7400-series integrated circuits - Wikipedia

    en.wikipedia.org/wiki/7400-series_integrated...

    FJH181 (=7454N or J) 2+2+2+2 input AND-OR-NOT gate. The Soviet Union started manufacturing TTL ICs with 7400-series pinout in the late 1960s and early 1970s, such as the K155ЛA3, which was pin-compatible with the 7400 part available in the United States, except for using a metric spacing of 2.5 mm between pins instead of the 0.1 inches (2.54 ...

  5. Talk:Inverter (logic gate) - Wikipedia

    en.wikipedia.org/wiki/Talk:Inverter_(logic_gate)

    Inverter is common (the TTL 7404 is a hex inverter rather than a hex not gate) and makes more sense. NOT gate puts the function into an AND, OR, XOR gate parallel naming scheme, but a single input function confuses the meaning of "gate". Glrx 18:41, 17 April 2012 (UTC)

  6. Direct-coupled transistor logic - Wikipedia

    en.wikipedia.org/wiki/Direct-coupled_transistor...

    Inverters; Series gating; Parallel gating; Each of these functions makes the output voltage supply low, so it does not have a negative impact on the other circuits in the machine. Each of these functions lowers the output voltage supply to prevent any negative impact on the other circuits in the machine., [clarification needed] [clarification ...

  7. Integrated injection logic - Wikipedia

    en.wikipedia.org/wiki/Integrated_injection_logic

    Because the output of the inverter can sink current but cannot source current, it is safe to connect the outputs of multiple inverters together to form a wired AND gate. When the outputs of two inverters are wired together, the result is a two-input NOR gate because the configuration (NOT A) AND (NOT B) is equivalent to NOT (A OR B) (per De ...

  8. OR-AND-invert - Wikipedia

    en.wikipedia.org/wiki/OR-AND-invert

    OR-AND-invert gates or OAI-gates are logic gates comprising OR gates followed by a NAND gate. They can be efficiently implemented in logic families like CMOS and TTL . They are dual to AND-OR-invert gates.

  9. National Semiconductor PACE - Wikipedia

    en.wikipedia.org/wiki/National_Semiconductor_PACE

    In the PACE this did not work properly; if the interrupt arrived at exactly the same time as a NIR3 or NIR5, the wrong interrupt code would be called from location 0 rather than 2. National Semiconductor suggested either not using this feature, or placing the same address in both locations so they would always call the same code, which would ...

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